On October 15, 2026, Taiwan Semiconductor Manufacturing Company (NYSE: TSM) reported third-quarter results that beat its own guidance on almost every line. Revenue came in at US$46.72 billion, up 41.2% year over year in dollar terms and 16.2% sequentially, above the top of the company’s US$44.6–45.8 billion guidance range. Net income rose 68.7% to NT$763.06 billion, and earnings per ADR reached US$4.60 against a consensus of roughly US$4.46. According to Yahoo Finance, it was the sixth straight quarter of record profit.
The stock fell anyway. TSM closed at $412.61 that day, down 2.28%, after trading more than 5% lower intraday. The headline worry was a phrase that will follow TSMC for the next several quarters: TSMC 2nm ramp margin dilution. Gross margin slipped from 67.7% in Q2 to 66.4% in Q3, and management guided Q4 to 65–67% because the steep ramp of the new 2nm (N2) node and the build-out of overseas fabs both weigh on profitability. Add a broad chip-sector selloff and CEO C.C. Wei’s comment that TSMC is “being prudent in our business planning going into 2027,” and the market chose to sell first.
We think that reaction misreads what the margin dip actually means. Here are the three points that frame this analysis:
1. The margin dilution is the cost of extending the lead, not a sign of eroding pricing power. New nodes always start below the corporate average margin and then climb as yields improve. N2 jumped from 3% of wafer revenue in Q2 to 8% in Q3, and management said N2-family capacity is expected to more than double in 2027. Even after dilution, a 66% gross margin is far above every listed foundry peer we compare later in this article.
2. AI demand is still running ahead of the company’s own long-term guidance. High-performance computing (HPC), mostly AI accelerators and data-center CPUs, reached 68% of revenue in Q3 and grew 22% quarter over quarter. Management said AI accelerator revenue growth will “probably” exceed the mid-to-high 50s percent compound annual growth rate TSMC guided for 2024–2029, although the company did not formally update that guidance.
3. The valuation reset makes the risk-reward attractive again. At $412.61, TSM trades at 26.6x trailing EPS of $15.54 and 18.1x consensus next-year EPS of $22.83, about 15% below its 52-week high of $487.47. The consensus price target of $554.79 implies 34.5% upside. Our own base case is more conservative at $502.
In this article we walk through the business model, the foundry industry and its structural growth drivers, the economic moat behind TSMC’s pricing power, five years of financials, a step-by-step valuation with bull, base and bear cases, the risks that could break the thesis, and a concrete exit plan.
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1. Company Overview
TSMC is a pure-play contract chip manufacturer, a “foundry.” It does not design or sell chips under its own brand. Instead, chip designers such as Nvidia, AMD, Apple, Broadcom and Qualcomm send their designs to TSMC, which manufactures the wafers and, increasingly, packages the finished dies together using advanced packaging technologies such as CoWoS (Chip-on-Wafer-on-Substrate). Revenue is earned per wafer, and the price per wafer climbs steeply with each new process node, so a leading-edge 3nm or 2nm wafer sells for multiples of a mature-node wafer.
That pricing structure is why node mix matters so much to TSMC’s earnings. In Q3 2026, advanced technologies (7nm and below) accounted for 79% of wafer revenue:
Process Node Share of Q3 2026 Wafer Revenue 2nm (N2) 8% 3nm (N3) 33% 5nm (N5) 28% 7nm (N7) 10% 7nm and below (total) 79% Mature nodes (16nm and above) 21%
Source: TSMC Q3 2026 earnings release (Form 6-K)
According to The Motley Fool, Q3 2026 was the first quarter in which 3nm overtook 5nm as TSMC’s biggest node by revenue share. 3nm at 33% compared with 5nm at 28%. That transition shows the mix keeps moving toward higher-priced wafers.
By end market, TSMC reports revenue in five platforms. The shift toward HPC has been dramatic:
Platform FY2025 Share Q3 2026 Share Q3 2026 QoQ Growth High-Performance Computing (HPC) 58% 68% +22% Smartphone 29% 21% +10% Internet of Things (IoT) 5% 4% +5% Automotive 5% 4% +23% Digital Consumer Electronics (DCE) 1% 1% -12%
Sources: TSMC Q4 2025 and Q3 2026 earnings calls
Two years ago, smartphones were a large part of the story. Today, AI and data-center silicon drive the business. HPC grew 48% in 2025, and its share rose another ten percentage points in just three quarters of 2026. The customer list reflects this. TSMC manufactures advanced processors for Nvidia, AMD and Broadcom, the companies at the center of AI infrastructure spending, alongside its long-standing smartphone customers.
Market position. TrendForce data for Q2 2026 put TSMC’s share of global foundry revenue at 72.5%, with roughly US$40.2 billion in quarterly revenue. Samsung Foundry was second at 5.9% (about US$3.26 billion) and SMIC third at 5.4%. Counterpoint uses a broader “Foundry 2.0” definition that includes packaging, testing and non-memory IDM manufacturing. On that basis, TSMC’s share was 42% in Q2 2026, versus 4% for Samsung. Either way, the gap between first and second place is enormous.
Ownership and governance. TSMC’s ordinary shares are listed in Taipei, and its American Depositary Receipts trade on the NYSE, with each ADR representing five ordinary shares. Based on the latest data, the ADR-equivalent share count is about 5.19 billion. The Taiwanese government’s National Development Fund is a long-standing shareholder, and foreign institutional investors hold a large share of the free float. Management has a consistent capital-return policy: a “sustainable and steadily increasing” quarterly dividend. The 2025 cash dividend was NT$18 per ordinary share, up from NT$14 in 2024. Total cash dividends paid in 2025 were NT$467 billion, up 28.6%.
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2. Industry Analysis
2-1. Market Size & Growth Trajectory
How big the foundry market looks depends heavily on how you define it. On the narrow definition used by TrendForce (revenue of the top ten pure-play and quasi-pure-play foundries), combined revenue reached a new high of about US$53.49 billion in Q2 2026, up 11.5% quarter over quarter. That is an annualized run rate of over US$210 billion. Yole Group frames the broader foundry industry as a roughly US$402 billion market once you include IDM-internal manufacturing that could, in principle, be outsourced. Counterpoint’s “Foundry 2.0” metric adds advanced packaging and testing as well.
Whatever the definition, the growth rate tells the story. TSMC’s own revenue grew 35.9% in US dollars in 2025 to about US$122 billion, and management guided full-year 2026 growth to about 44% in US dollars. That implies roughly US$175 billion of 2026 revenue (est.). For a company of this size, that growth rate is unusual, and it reflects the industry’s position in its cycle.
We place the leading-edge foundry market in the acceleration phase, not maturity. The evidence:
– Demand for leading-edge wafers still exceeds supply, according to management on the Q3 call.
– TSMC raised its 2026 capital budget during the year from an initial US$52–56 billion (January guidance) to US$60–64 billion, which it reiterated in October.
– Management said capital spending over 2026–2028 will be “even more significantly higher than the past three years.”
– N2 entered high-volume manufacturing in Q4 2025 and reached 8% of wafer revenue in only its third full quarter.
Mature nodes (16nm and above) are a different story. That market is closer to a cyclical, competitive commodity business, where Chinese foundries such as SMIC and Hua Hong are adding capacity aggressively. SMIC’s revenue grew about 20% quarter over quarter in Q2 2026, per TrendForce. TSMC’s exposure to that segment is shrinking: mature nodes were 21% of wafer revenue in Q3 2026. That matters for the investment case, because the part of the market where TSMC faces real price competition is becoming a smaller share of its business every year.
The cycle position is the key debate behind the stock’s recent weakness. Bears argue that AI infrastructure spending is peaking and that TSMC is adding capacity at the top. Bulls argue that the AI build-out is in its early innings, with agentic AI adding a new wave of compute demand. Management’s own data points lean bullish. AI accelerator demand is running above a guided mid-to-high 50s percent CAGR through 2029, and Wei specifically cited “increasing AI demand fueled by the rising adoption of agentic AI.”
2-2. Structural Growth Drivers: AI Demand vs. TSMC 2nm Ramp Margin Dilution
Driver 1: AI accelerators and the shift from training to inference and agents. The most important driver is the multi-year build-out of AI data centers. Nvidia’s GPUs, AMD’s Instinct line and the custom ASICs that Broadcom designs for hyperscalers all depend on TSMC’s leading nodes and CoWoS packaging. What has changed in 2026 is the nature of demand. Early AI spending was dominated by training clusters. Now inference, running models for end users, is scaling, and agentic AI adds a further layer. Agents chain many model calls together and lean on general-purpose CPUs for orchestration. Wei noted that demand from “agentic AI CPUs continues to increase,” which matters because TSMC’s AI accelerator guidance excludes CPUs entirely. In other words, the narrow AI number management talks about understates TSMC’s total AI exposure. HPC’s 22% quarter-over-quarter growth in Q3 shows the driver is still accelerating, not plateauing. In the short term, this driver is constrained by capacity rather than demand. Over the long term, the key question is whether hyperscaler capital spending can keep compounding. We think that depends on AI monetization, which we treat as the biggest swing factor in our scenarios.
Driver 2: Node migration — N2 now, A14 next. Each new node delivers better performance per watt, and in a power-constrained data center, performance per watt translates directly into revenue for TSMC’s customers. That gives chip designers a strong incentive to move to the newest node as quickly as possible, even at higher wafer prices. TSMC’s roadmap is well laid out. N2 entered volume production in Q4 2025 and is ramping steeply, and N2-family capacity is expected to more than double in 2027. A14 (1.4nm-class) is slated for risk production in 2027 and volume production in 2028. Samsung, by comparison, has targeted 2029 for its own 1.4nm entry, according to the Korean press. TSMC also has 3nm capacity coming in Tainan in 1H 2027 and again in 1H 2028, at Arizona Fab 2 in Q3 2027, and in Japan in 2028. Node migration is also the mechanism behind the margin story. A new node dilutes margins in its first year or two, then becomes accretive as yields mature and depreciation rolls off. N3 went through the same pattern. It diluted margins at launch, yet by Q3 2026 it was TSMC’s top revenue node at 33% and helping to hold corporate gross margin above 66%. We expect N2 to follow the same curve, with the drag peaking in 2026–2027 before turning into a tailwind.
Driver 3: Advanced packaging as a second growth engine. As single chips approach the physical limits of a lithography reticle, performance gains increasingly come from packaging multiple dies together: logic, high-bandwidth memory and I/O. TSMC’s CoWoS technology is widely used in high-end AI accelerators, and Wei said on the Q3 call that CoWoS is “still the number one choice for our customer.” The roadmap is moving to ever-larger packages. A 5x reticle-size version is in production, and 9x and 14x versions are in development. Packaging matters to the investment case for two reasons. First, it adds revenue per customer on top of the wafer. Second, it deepens lock-in, because a customer whose product depends on TSMC’s integrated wafer-plus-packaging flow would have to re-qualify both the die and the package to move elsewhere. In the short term, CoWoS capacity has been a bottleneck for the whole AI supply chain. Over the long term, the shift to larger multi-die packages points to packaging growing faster than wafer revenue.
Driver 4: Geographic diversification and onshoring demand. Governments in the US, Japan and Europe want leading-edge chip production closer to home, and customers want supply-chain resilience. TSMC’s overseas build-out in Arizona and Japan responds to that demand, and the company is now evaluating Texas as well. Asked about Texas, Wei said, “We send the teams to Texas to do all the evaluation,” after Elon Musk said he was in early talks with TSMC about his Terafab chip initiative there. In the short term, overseas fabs dilute margins: management expects about 2 percentage points of gross-margin dilution in 2026, widening to 3–4 points later in the five-year period. Over the long term, overseas capacity lowers geopolitical concentration risk and helps secure customers and governments that pay for supply security.
2-3. Competitive Landscape
The table below compares TSMC with listed foundry peers. Note that Samsung Foundry is part of Samsung Electronics and does not report standalone margins, and Intel’s figures are for the whole company, with Intel Foundry still loss-making on a segment basis.
Company Ticker TTM Revenue Operating Margin Market Cap Q2 2026 Foundry Share (TrendForce) Primary Moat TSMC TSM $156.42B 57.79% $2,139.99B 72.5% Process leadership, scale, packaging, ecosystem Samsung Foundry (part of Samsung Electronics) ~$13B annualized (est.) Not disclosed n/a 5.9% Gate-all-around early adoption, memory integration SMIC (HK/Shanghai listed) ~$12B annualized (est.) Not compared n/a 5.4% China domestic demand, policy support UMC UMC $8.07B 18.88% $49.83B 3.9% Mature-node specialty processes GlobalFoundries GFS $6.94B 11.59% $25.62B 3.2% Specialty and US-based trusted foundry Intel (whole company) INTC $57.03B 8.03% $474.96B n/a 18A/14A roadmap, US government backing
TTM revenue, operating margin and market cap for TSM, UMC, GFS and INTC from Finviz; foundry share from TrendForce Q2 2026; Samsung and SMIC annualized from TrendForce Q2 2026 quarterly revenue (est.)
Why TSMC is better positioned than peers. The table shows the core of the investment case: TSMC earns an operating margin of 57.79%, roughly three times UMC’s 18.88% and five times GlobalFoundries’ 11.59%. Scale alone does not explain the gap. UMC and GlobalFoundries compete mainly at mature nodes, where pricing is set by capacity supply. TSMC earns most of its revenue at nodes where it faces limited direct competition.
At the leading edge, TSMC’s credible challengers are Samsung and Intel. Samsung’s foundry share declined to 5.9% in Q2 2026, and its Taylor, Texas fab has slipped nearly two years behind its original 2024 target, according to the Korea Herald. Intel is investing heavily in its 18A and 14A processes and has US government support. But 18A is only beginning to ramp and remains largely dedicated to Intel’s own products, per Yole Group, and Intel reported a trailing net loss of $11.29 billion. Intel’s CFO has set a goal of overtaking Samsung for the No. 2 foundry position by 2030. That target says a lot about the real competitive distance to TSMC.
The more realistic long-term threat is a hyperscaler or chip designer dual-sourcing part of its volume, at Intel 14A or Samsung 2nm, for supply security or for political reasons. We think that is likely at the margin over time. But dual-sourcing a small share of volume is very different from losing the core flagship programs, and TSMC’s lead in yield, packaging integration and capacity makes the latter unlikely within our investment horizon.
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3. Economic Moat Analysis
Moat Type 1: Cost Advantage and Efficient Scale
The leading-edge foundry business has fixed costs that only one or two companies in the world can bear. TSMC’s 2026 capital budget is US$60–64 billion. Its 2025 capital spending was US$40.9 billion, versus US$29.8 billion in 2024. In Q3 2026 alone, TSMC spent TWD443 billion (about US$13.8 billion) on capex. Few competitors can fund that from internal cash flow. TSMC generated about TWD920 billion of operating cash flow in Q3 2026 and NT$1 trillion of free cash flow in 2025, even while funding a sharply higher build-out.
Scale creates a self-reinforcing loop. The highest volumes give TSMC the fastest learning curve on yields. Better yields lower cost per good die, which attracts more customers. More customers fund the next node’s capex, which competitors must match without the same revenue base. The financial evidence is in the margins. Even while absorbing the N2 ramp and overseas-fab dilution, TSMC posted a 66.4% gross margin and a 58.7% operating margin in Q3 2026. Gross margin a year earlier was 59.5%, so TSMC expanded margins by about seven points through one of its heaviest investment periods.
Pricing power is the other proof point. JPMorgan, cited by TrendForce ahead of the Q3 report, pointed to high 3nm and 5nm utilization and foundry price increases as reasons margins would hold near the top of guidance. Wei said on the call that pricing depends on segment, location and technology. That suggests TSMC prices strategically, with location-based pricing for overseas wafers, rather than holding prices flat.
This is efficient scale in Morningstar’s sense. The market for leading-edge logic wafers can profitably support only a small number of producers, and a new entrant would need tens of billions of dollars and years of process learning before earning a return.
Moat Type 2: Switching Costs and Ecosystem Lock-in
A modern chip design is not portable. A design built for TSMC’s N3 or N2 uses TSMC’s process design kits, standard cell libraries, memory compilers and third-party IP blocks validated on that specific process. Moving a design to Samsung or Intel means re-implementing physical design, re-validating IP, re-qualifying reliability, and in many cases redesigning the advanced package. That costs hundreds of millions of dollars and, more importantly, a year or more of time-to-market for a flagship product. In AI accelerators, where product cycles now run annually, losing a year is not acceptable for most customers.
TSMC’s Open Innovation Platform ecosystem adds network effects on top of switching costs. EDA vendors, IP providers and design-service firms all prioritize TSMC’s nodes because that is where most leading-edge tape-outs happen. That makes it easier for the next customer to choose TSMC, which in turn keeps the ecosystem focused on TSMC.
Packaging deepens the lock-in. CoWoS integrates TSMC-manufactured logic dies with high-bandwidth memory in a single package. A customer who wants to move the wafer business also has to move, or split, the packaging flow. That is why Wei can describe CoWoS as “still the number one choice for our customer” even as rival packaging technologies emerge.
Moat Durability Assessment
Will this moat hold in five to ten years? We think the core of it will, but it faces three real risks.
Risk to the moat 1: A competitor closes the process gap. Intel’s 14A and Samsung’s gate-all-around roadmap are credible engineering programs, and TSMC plans to adopt High-NA EUV lithography around 2030, later than some competitors. If Intel or Samsung delivers a node with clearly better performance per watt and competitive yields, a major customer could move a flagship product. Counterargument: process leadership is about yield and volume as much as the transistor itself. Competitors have announced aggressive roadmaps many times before, and TSMC’s share actually widened in 2025, with the TrendForce gap to Samsung growing from 55 points in 2024 to 62.7 points in 2025.
Risk to the moat 2: Political forced diversification. Governments could push customers to dual-source for national-security reasons, regardless of economics. Counterargument: TSMC’s own overseas fabs partly neutralize this. A customer can buy “US-made” wafers from TSMC Arizona without leaving the TSMC ecosystem.
Risk to the moat 3: Customer vertical integration. Hyperscalers designing their own chips could, in theory, pressure TSMC on price. Counterargument: custom ASICs still need a foundry, and today they overwhelmingly go to TSMC. More chip designers generally means more TSMC customers, not fewer.
Our conclusion: the moat is wide, and it is widening at the leading edge even as competition intensifies at mature nodes, which are a shrinking share of TSMC’s revenue.
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4. Financial Analysis
The table below shows TSMC’s annual results for 2022–2025 and its trailing twelve months through Q3 2026. Revenue is shown in US dollars (TSMC’s own USD-reported figures). Net income and EPS are in New Taiwan dollars, the company’s reporting currency.
Year Revenue (US$) YoY (US$) Gross Margin Operating Margin Net Income (NT$) EPS (NT$) 2022 $75.88B +33.5% 59.6% 49.5% NT$1,016.5B 39.20 2023 $69.30B -8.7% 54.4% 42.6% NT$838.5B 32.34 2024 $90.08B +30.0% 56.1% 45.7% NT$1,173.3B 45.25 2025 ~$122B +35.9% 59.9% 50.8% ~NT$1,718B (est.) 66.25 TTM to Q3 2026 $156.42B — 65.07% 57.79% $80.58B (US$) $15.54 per ADR
2022–2025 from TSMC annual results; 2025 net income estimated from reported EPS × weighted share count; TTM from Finviz
The story behind each year. 2022 was a strong year, with pandemic-era demand and price increases pushing gross margin close to 60%. 2023 was the down-cycle: smartphone and PC demand collapsed, customers worked down inventory, and dollar revenue fell 8.7%. Gross margin dropped to 54.4% as utilization fell and the N3 ramp began diluting margins. 2024 marked the start of the AI cycle. HPC took off, revenue grew 30% in dollars, and margins recovered. 2025 was the acceleration year: revenue up 35.9% in dollars, gross margin up 3.8 points to 59.9%, operating margin up 5.1 points to 50.8%, and EPS up 46.4%. ROE rose to 35.4%.
2026 so far. The trailing twelve months show how far the cycle has gone. TTM revenue is US$156.42 billion, gross margin 65.07%, operating margin 57.79%, net margin 51.52% and ROE 41.98%. Q3 2026 revenue grew 41.2% year over year in dollars, and quarterly sales grew 41.11% on Finviz’s measure. Management’s guidance implies Q4 revenue of US$52.3–54.3 billion, about 14% sequential growth at the midpoint and well above the roughly US$50.5 billion consensus cited by one analysis before the report.
Key operating metrics.
– Node mix: 79% of wafer revenue at 7nm and below; N2 at 8% and rising quickly.
– HPC share: 68% of revenue in Q3 2026, versus 58% for full-year 2025.
– Inventory days: 82, down five days, mainly because of higher wafer shipments.
– Capex intensity: about US$13.8 billion in Q3 2026, against a full-year budget of US$60–64 billion.
Balance sheet and cash flow. TSMC has a very strong balance sheet. Cash and marketable securities stood at about TWD4 trillion (roughly US$126 billion) at the end of Q3 2026. Debt-to-equity is just 0.14. Operating cash flow was about TWD920 billion in Q3 2026 alone. Subtracting TWD443 billion of capex leaves roughly TWD477 billion of quarterly free cash flow (est.). In 2025, free cash flow was NT$1 trillion, up 15.2%, after US$40.9 billion of capex. Even with capex rising toward US$60 billion or more, operating cash flow growth has so far outpaced spending.
Margin expansion story — and how TSMC 2nm ramp margin dilution fits in. The key financial question is how much margin TSMC can hold while it ramps N2 and expands overseas. Management guided Q4 2026 gross margin to 65–67% and operating margin to 56.5–58.5%. Overseas-fab dilution runs at about 2 points in 2026 and could widen to 3–4 points. Against that, N3 maturing into a high-margin node, continued pricing discipline and higher utilization are offsets. Wei said there is “no ceiling” on profitability, but that a dramatic increase “will not happen overnight.” In short, TSMC 2nm ramp margin dilution is a timing issue, not a structural one. Our base case assumes gross margin settles in a 63–66% range through 2027, below the Q2 2026 level of 67.7% but far above TSMC’s 2023–2024 levels.
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5. Valuation
Method: Forward P/E on Consensus EPS
For a highly profitable, cash-generative company like TSMC, a forward P/E approach is the most transparent method, cross-checked with EV/Sales. We use the consensus estimate of next-year EPS.
Step 1 — Inputs (live data):
– Current price: $412.61
– EPS (ttm): $15.54 → trailing P/E = 412.61 ÷ 15.54 = 26.6x
– EPS next year (consensus): $22.83 → forward P/E = 412.61 ÷ 22.83 = 18.1x
– Shares outstanding (ADR-equivalent): 5.19 billion; market cap $2,139.99 billion
– Consensus target price: $554.79
Step 2 — Choose a target multiple. TSMC is growing EPS much faster than the S&P 500 (EPS growth this year of 63.25% on Finviz). But it is also a capital-intensive, cyclical manufacturer with geopolitical concentration in Taiwan. Both factors justify a multiple that is neither a deep discount nor a software-style premium. We use:
– Base case: 22x forward EPS. This is a modest premium to the current 18.1x, reflecting the market’s likely rerating once margin dilution proves temporary.
– Bull case: 25x forward EPS. This assumes AI demand beats guidance and N2 margins mature faster than feared.
– Bear case: 16x on EPS 15% below consensus. This assumes an AI capex pause in 2027 cuts earnings and compresses the multiple.
Step 3 — Calculate price targets:
Scenario EPS Assumption Multiple Price Target vs. $412.61 Bull $22.83 (consensus) 25x $571 +38.3% Base $22.83 (consensus) 22x $502 +21.7% Bear $19.41 (consensus −15%) 16x $310 −24.8%
– Base: 22 × $22.83 = $502.26
– Bull: 25 × $22.83 = $570.75
– Bear: 16 × ($22.83 × 0.85 = $19.41) = $310.49
Step 4 — EV/Sales cross-check. With roughly US$126 billion of cash and securities and about US$28 billion of debt (est., from Debt/Eq of 0.14 on book equity of about US$202 billion), TSMC has net cash of about US$98 billion (est.). That puts enterprise value near US$2.04 trillion (est.), or about 13.1x TTM sales of US$156.42 billion. For a business with a 51.5% net margin, 13x sales is equivalent to about 25x trailing earnings, consistent with the P/E view. Valuation on sales looks stretched only if margins are about to fall sharply. Nothing in the Q4 guidance points that way.
Comparison to Consensus
Our base target of $502 sits about 9.5% below the consensus target of $554.79. We agree with the direction of consensus, but we deliberately apply a smaller multiple for two reasons. First, the market just showed it will punish margin dilution even when revenue beats, so we do not want our base case to rely on a full rerating. Second, Wei’s “prudent” stance on 2027 suggests that consumer and price-sensitive segments could soften. That matters less for HPC but can still weigh on the smartphone platform, which is 21% of revenue.
Where consensus may be right and we may be too cautious: if TSMC grows revenue about 44% in 2026 and keeps operating margins above 56%, the $22.83 EPS estimate itself could prove low, and our base target would rise with it. That is the bull case.
Risk-Reward
At $412.61, the base case offers +21.7% and the bull case +38.3%, against −24.8% in the bear case. The probability-weighted outcome favors the upside, in our view, because the bear case requires a demand break that is not visible in the current guidance or order commentary. The stock is also 15.4% below its 52-week high of $487.47 even though the fundamentals improved over that period.
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6. Risk Factors
Risk 1: Geopolitical concentration in Taiwan. Most of TSMC’s leading-edge capacity sits in Taiwan, across the Taiwan Strait from mainland China. Any escalation in cross-strait tensions, from a blockade to a disruption of shipping lanes or energy imports, would hit TSMC’s operations and, through it, the global electronics supply chain. This risk is not new, and it is often cited as a reason investors apply a lower multiple to TSMC. The overseas build-out in Arizona, Japan and possibly Texas reduces the risk over time, but leading-edge volume will remain concentrated in Taiwan for years. Investors should size positions with this tail risk in mind: it is hard to hedge and could produce losses well beyond our bear case. We do not model it explicitly because it is a binary, low-probability event, but it caps the multiple we are willing to pay.
Risk 2: Margin dilution lasting longer than expected. The market’s reaction to Q3 shows how sensitive the stock is to gross margin. Management expects overseas fabs to dilute margins by about 2 points in 2026 and 3–4 points later, and N2’s steep ramp adds further dilution. Tool supply is tight, and tool price inflation could push capex and depreciation higher. Capex for 2026–2028 is set to rise significantly above the prior three years. If N2 yields mature more slowly, or US production costs stay well above Taiwan’s, gross margin could fall toward 60% instead of holding the 63–66% range in our base case. Each percentage point of gross margin is worth roughly US$1.5–1.75 billion of annual gross profit at current revenue levels (est.), so a sustained 5-point miss would meaningfully cut EPS and the multiple investors are willing to pay.
Risk 3: An AI capex cycle reversal and customer concentration. HPC is 68% of revenue, and a handful of AI chip designers and hyperscalers drive most of that demand. If AI monetization disappoints and hyperscalers cut capital spending in 2027, TSMC would see orders slow just as its own capex and depreciation peak. That is the classic semiconductor down-cycle setup, and it is our bear case. Warning signs already exist in the broader market. Per The Motley Fool, CoreWeave fell 17.6% and the VanEck Semiconductor ETF fell 8.2% in the week of the report, amid investor skepticism about circular AI financing deals and rising interest rates. A sharp rise in long-term rates, with the 10-year Treasury yield shown at about 5.1% on Yahoo Finance on the report date, also compresses the valuation of long-duration growth stocks. TSMC’s management sees no slowdown yet: demand “continues to be extremely robust.” But the cycle can turn faster than guidance can adjust.
Additional risks to monitor: currency swings (TSMC guides on an assumption of 31.8 NT$ per US$), US trade policy and possible semiconductor tariffs, power and water supply in Taiwan (management currently views power supply as manageable), and High-NA EUV timing relative to competitors.
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7. Conclusion & Exit Plan
Investment rating: Buy.
The Q3 2026 report confirmed that the TSMC 2nm ramp margin dilution is a temporary cost of extending its process lead, not a crack in its pricing power. Revenue beat the top of guidance, Q4 guidance came in above consensus, HPC reached 68% of sales, and management said AI accelerator demand will probably exceed its own long-term growth guidance. The stock fell on margin and macro worries, leaving it at 18.1x forward earnings, a level we consider reasonable for a company with a 57.79% operating margin, a 72.5% share of global foundry revenue (TrendForce, Q2 2026), and a visible multi-year node roadmap.
Entry price range: $380–$420. The current price of $412.61 sits inside the range. We would add more aggressively closer to $380, where the base case implies about 32% upside. We would not chase the stock back toward the $487 high without new evidence that gross margin has stabilized.
Exit conditions:
– Target achieved: Take partial profits (about one-third of the position) at the base-case target of $502. Trim another third if the stock reaches the bull-case $571.
– Fundamental break: Sell if (1) gross margin falls below 60% for two consecutive quarters without a clear N2 recovery path, (2) management cuts its AI accelerator growth outlook below the mid-to-high 50s CAGR, or (3) a major AI customer publicly moves a flagship product line to a competing foundry.
– Time-based: Reassess after Q4 2026 results in January 2027, when TSMC typically issues its full-year outlook and capex budget. Our full thesis review is in six months (April 2027).
What to watch next: the 2027 capex and revenue guidance in January, the pace of N2’s share of wafer revenue, the CoWoS capacity outlook, Arizona Fab 2 progress toward 3nm production in Q3 2027, and any decision on a Texas fab.
Item Detail Company Taiwan Semiconductor Manufacturing Co. (TSM) Current Price $412.61 Target Price $502 (base) / $571 (bull) / $310 (bear) Upside 21.7% (base case) Rating Buy Key Thesis N2 margin dilution is temporary; AI demand is running above long-term guidance and the stock trades at 18.1x forward EPS Main Risk Taiwan geopolitical concentration and an AI capex reversal in 2027
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This content is general investment information provided to an indefinite/unspecified audience by a quasi-investment advisory business registered under Korea’s Financial Investment Services and Capital Markets Act, and is not personalized 1:1 investment advice tailored to any individual investor. This analysis is for informational purposes only and is not a solicitation to invest. All investment decisions and their consequences rest solely with the investor. The estimates and assumptions in this report are as of the writing date (2026-10-18) and may not materialize depending on market conditions and geopolitical variables. Financial data used reflects sources such as company filings and analyst consensus, and the scenarios and price targets represent the author’s conservative assessment. All investments carry the risk of principal loss, and past performance or analytical track record does not guarantee future results. As of the writing date, the author does not hold a position in this stock. The author’s holdings and positions may change without prior notice depending on market conditions.
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참고 자료
- TSMC Form 6-K Q3 2026 Earnings Release (SEC)
- TSMC (TSM) Q3 2026 Earnings Call Transcript (The Motley Fool)
- TSMC Q3 2026 Earnings Call Highlights (Yahoo Finance)
- TSMC stock drops despite record profit amid extremely robust demand for AI chips (Yahoo Finance)
- TSMC Just Posted Record Profit for the Sixth Straight Quarter. Why Did the Stock Fall? (The Motley Fool)
- TSMC 3Q26 Net Profit Surges 68.7% to Record NT$763B (TrendForce)
- TrendForce 2Q26 Top-10 Foundry Ranking
- TSMC Q4 2025 Earnings Summary (VectorShift)
- Samsung vs TSMC foundry gap, Intel 2030 goal (Herald Business)
- Samsung Taylor fab delay (Korea Herald)
- Three misconceptions about the $402B foundry industry (Yole Group)